The radar platform developed in B105 Electronic Systems Lab contains a microcontroller which process the I and Q signals adapted from the radar transceiver in order to obtain targets information -speed and distance-. The microcontroller used is a low-power STM32L496 that has a DSP module and enough RAM to perform processing tasks. It runs at 48 MHz and has low-power mode, which allows using our platform in battery-powered Wireless Sensor Networks applications.
The software developed in the microcontroller uses the YetiOS operating system which has also been developed in B105 Electronic Systems Lab and is based on well-known FreeRTOS. The architecture of the radar processing module is composed by two tasks:
- Acquisition and Generation Task. This task is responsible of taking samples from the ADC and generating signals using the DAC synchronously. Both acquisition and generation is done using DMA, so other tasks -such as processing one- could run while taking samples.
- Processing Task. This task provides the processed information -speed and distance of targets- to the final user. The acquired signal is filtered so the information in undesired frequency bands is eliminated. Besides, a Fast Fourier Transform (FFT) is performed in order to obtain the signals in the frequency domain. Then an OS-CFAR algorithm is applied to select the frequency peaks corresponding to targets, and the targets are selected based on signal levels and SNR ratio.
We have tested the complete radar system in real scenarios and we can process each 128 samples signal in 15 ms. That means that our radar sensor provides distance and speed information with a rate higher to 60 samples per second.
Finally, we have developed an user interface which allows us testing different configuration and the behaviour of the radar sensor on different scenarios.