In the last years, the Vehicular Ad hoc Networks or VANET’s are gaining relevance in order to improve traffic management and road safety. In addition, autonomous cars technology has been a boost for VANET’s research in recent years. One of the main services provided by a VANET is the localization support with a  Global Position System or GPS. However, the GPS has an error of 3 to 7 meters, a better accuracy may be necessary in some applications. Moreover, in areas with no GPS coverage like tunnels there would not be any localization support. Therefore, another localization method should be implemented to improve accuracy and coverage, which is the main purpose of this project.

In this degree project, a VANET has been used to provide vehicle localization. However, conventional VANETs devices are very expensive and have very large power consumption, so we use a Wireless Sensor Network or WSN as a low-cost and low-power alternative. WSN’s are similar to wireless ad hoc networks, but they have a lower cost. However, these resource-constraint networks does not allow implementing complex algorithms.

The localization algorithm selected in this project is the Fuzzy Ring-Overlapping Range-Free or FRORF. It has been modified so it could be implemented in resource-constraint nodes with low computational capabilities. This algorithm has been implemented in wireless nodes developed by the B105  Electronic Systems Lab and several tests have been performed in different scenarios. The position of the vehicle has been obtained in these scenarios and has been compared with the position obtained from a commercial GPS module.

With the results it is possible to conclude that the implemented algorithm has an error of 1 to 9 meters. This error is similar to the GPS error, so the FRORF algorithm can provide a reasonable position of a car. Althougth the accuracy needed for a VANETs is not solved, the algorithm provides localization in interior areas. This advance is very important as localization support services may be provided in zones without GPS coverage.

A Modular-Reconfigurable Presentation System Design and Implementation Based on LEDs


This project “A modular-reconfigurable presentation system design and implementation based on LEDs” consists of a LED screen design and development at hardware and software level, features cited in the name of this project.

In order to approach its design, we have started making an art state investigation, through which some similar projects to this one have been looked into.

Next, we carried out a hardware design and implementation. During this stage two hardware versions were developed.

Then, the software design and development have taken place. A first software stage is executed by the PC and the other stage is executed by the microcontroller. During this phase of the project we have developed many block versions which made the software architecture up.

Later, different hardware and software level tests were performed.

Finally, some full system tests were also carried out.

The project has been developed in seven phases as shown as per below chart.


As said before, the presentation system is made up of a hardware and software structure. The hardware structure is constituted by some elements, from which It is emphasized the relevant LED screen and the development board that includes a microcontroller. The software structure has been coded at PC and within a microcontroller too. This main project aim has been to desing a modular system presentation and resettting based on LEDs.

The main objective is broken down into four purposes

  • Draw up a modular and reconfigurable LED screen.
  • Develop a microcontroller software to allow using the LED screen.
  • Develop a software by PC to display a photo on the LED screen.
  • Develop a software by PC to display a video on the LED screen.

It is relevant to clarify that every pixel of this screen is encoded by 24 bits. These bits are G7, G6, G5, G4, G3, G2, G1, G0, R7, R6, R5, R4, R3, R2, R1, R0, B7, B6, B5, B4, B3, B2, B1, B0 as shown as per below chart.


The hardware architecture is a set of physical blocks through which this system is based on. In the basis of the system outcome and the hardware requirement some hardware architecture blocks have been defined.  The hardware architecture that makes up the bits is described as per below.

  • PC: It executes processor-transmitter software blocks.
  • USB-serial converter: It Carries GRB bits forward to microcontroller.
  • Microcontroller: It executes receiver-presentation software blocks.
  • Logic level converter: It goes the amplitude up from the PWM to the microcontroller pins GPIO output, from 3.3 [V] to 5 [V].
  • LED screen: It is made up of LED modules. Each module has 25 LEDs. For LED modules manufacturing purposes some LEDs SMD 5050 have been chosen, these LEDs mix an integrated circuit enclosed in. This circuit incorporates a signal amplifier and depending on the manufacturer also a sequential logic block. This way, the signal is empowered through each LED and 24 bits data is addressed to, from which 8 bits are related to sub LED G, 8 are linked up  to sub LED R and 8 bits are connected to sub LED B. So that, color and bright are separately controlled for every LED.
  • Power supply: It is setup into a star topology. Supplies 23 [A] to the system.

By means of next chart, hadware arquitecture is shown as per below.


The LED screen is composed by four module rows of LEDs, each module row is assigned by a data line as per below.


For the LEDs screen, it has been decided to use several parallel data lines, due to it aims to overcome a LEDs handicap. This handicap consists of when broadcasting a 30 [frames/s] – streaming video. It does not allow to connect more than 1024 LEDs into serial architecture. Essentially because of timing  purposes. Which are exposed by means of this reasoning: If the rate to broadcast this video is 30 [frames/s], this indicates every 0.033 [s] a frame to display on LEDs is loaded. Tframe = 0.033 [s].

On the other hand, Tbit=1,25 [µs] which is a value forced by the LEDs.

As discussed earlier in this report, 24 bits are related to every single pixel, immediately after sending all bits towards the LEDs, a time must be saved for a 50 [µs] reset. This way, sending period expression, it is as it follows:
Tsend = ( 1.25 [µs/bit] x 24 [bits/pixel] x 1024 [pixels] ) + Treset = 0.03077[s]

Checking out on, Tsend < Tframe.

That is, this limitation resides in central premise that, sending time cannot be greater than frame time, whether more than 1024 LEDs are connected in cascade architecture, it is need a time greater than frame time, therefore it breaks that premise.

For the case in which the rate to broadcast this video is 60 [frames/s], could be linked into  cascade connecting factors up to 512 LEDs.

Therefore, there is an inversely proportional relationship between the video rate broadcast and the number of LEDs to be connected in cascade.

The software architecture is composed by two phases, one developed to PC and another to microcontroller.

In the PC phase, processor and transmitter blocks have been processor defined. This stage consists about reproducing a video signal and executing some processor and transmitter blocks for each frame from the video signal.

In the microcontroller phase, it is been defined both receiver and presentation blocks. In this stage continuously some bytes are received through UART and are shown on the screen.

The next diagram shows the software architecture.


Now we describe the software blocks functions

  • Processor block: This block extracts the pixels from each frame and it organises them according to the data line of LED screen. Then, it moves these GRB bits to the corresponding bit of data line and then it stores those GRB bits in an array.
  • Transmitter block: This block is in charge of transmitting in serial the array obtained in the processor block.
  • Receiver block: This block receives in serial the bytes of array transmitted by the transmitter block. That array contains sorted pixels according to line mapping data on the LEDs screen.
  • Presentation block: This block carries the symbols “1” or “0” to GPIOs MCU. Those symbols are generated as from extracted pixels from each frame. It should be clarified that GPIOD pines within microcontroller are linked up to the LEDs screen.

The symbols are illustrated below.


Consequently, it is graphically represented by the way different blocks interact one another.


For a video composed by n frames, first the processor block is run for all the pixels within frame 1, then transmitter block sends GRB bits associated to frame 1 towards MCU. After that, receiver block is run for frame 1 and while presentation block shows GRB frame 1 bits on the screen, also GRB bits are received from frame 2.

This way, successively software blocks are run for video n frames.

This system has been tested projecting a video composed by 462 frames, this video is reproduced at 29.97[frames/s] speed. Next link illustrates that test.

Poster about Methodology for implementation of Synchronization Strategies for Wireless Sensor Networks


On the occasion of the II edition of the Symposium “Tell us your thesis” organized by the Universidad Politécnica de Madrid I created a poster summary of my thesis.

Both the thesis and the poster are entitled “Methodology for implementation of Synchronization Strategies for Wireless Sensor Networks“.

In the poster I intend to explain the process that every researcher and/or developer must carry out to add synchronization tasks to his Wireless Sensor Network.

180216 Methodology for implementation of Synchronizatoin WSN
Methodology for implementation of Synchronizatoin WSN

First of all it is needed to know what is the objective of the user application in which we want to add temporary synchronization.

Based on the application we will have some requirements to fulfill. That is, each application will have different requirements regarding timing, maximum permissible error regarding temporal precision or accuracy, network topology, message distribution method, battery consumption and life time objectives, hardware resources of different nature and different price, etc.

Since there are many options and possible ways, a methodology is needed that helps the researcher and/or developer to obtain a solution, in order to achieve a time synchronization in their wireless sensor networks, which is adapted to the needs of the application.

The development of this methodology is the objective of this doctoral thesis.

Download the poster with full resolution [PDF 18 MB]

TFM: Design of a node for control and power consumption measurement of domestic electrical equipment


by Alvaro Sanchez

The research project Sonrisas developed by B105 Electronic Systems Lab of ETSIT-UPM and the company BQ has as its general objective the development of an innovative system for the implementation of services in the field of IoT.

In this context has been carried out the development of one of the nodes of the project network. This node consists of a plug for remote connection and disconnection that also allows the measurement of the power consumed by the equipment connected to the plug.

The prototype implemented includes voltage and current sensors whose data are read and processed by a microcontroller that performs the estimation of the consumption of different loads by means of a window reading algorithm. The estimated consumption is sent to a user interface. The remote activation and deactivation of the plug is controlled by a command from the implemented interface.


The implemented test bench has allowed the validation of the switching and measurement functions with a deviation of less than 1% with respect to the real load values.

The project has been carried out following low cost, low consumption and reduced dimensions’ design metrics, pursuing the future commercialization of the system.

Design strategies for detecting action potentials in actions based on movements


This work is located in the studies of the brain and their signals. The puspose is to know when someone wants to make a movement. Thus, it might help to people that actually are not able to move a member of their body or more. Mainly, it is focused in the design of strategies for detection of action potentials or spikes when a movement wants to be made. This study is not looking for action potentials form, it is looking for patterns and characteristics that allow to recognize the movement. Although there are action potentials covered by the signals taken from the electrodes, but they are unavailable.

To accomplish the objective, it is used the EEG signals of a public data base. It is selected the ones related to the movement of the hands, concretely, the movement of open and close the fist. Signal sources of noise that dirty the signal are analyzed, they are called artifacts, and then, filtering stage comes, giving the signals of below for movement and no movement.


Now, possible algorithms are checked. It is decided to use the Wavelet transform and the way in which it obtains the energy of the signal. Thanks to the calculation of Wavelet energy in 22 subjects, it is reached to the conclusion that Wavelet energy for movement is higher than for no movement. So, electrodes that comply with this condition at 100% are 4.

The final algorithm is implemented three features: correlation, a parameter that gives a relation between two signals, their energy range and their energy average. It could be said that algorithm has two parts: a training stage and a decision stage. Inside decision part, there are three algorithms: ProMove, ProMove + improve and Logic. The basic difference among ProMove and Logic is an or (||) and an and (&). The improve is based on empiric knowledge.




Final conclusions show that the signals between subjects are very changing. Therefore, same algorithm is not useful for everybody. To some subjects, the successful probability is very high (92,86% – 1 fail), while for others is more low than what is expected (50% – 7 fail). With these test, the importance in the length of the signals is reflected, because if signals for subjects with more than 3 fails are inversely processed, the fails are reduced. The most useful algorithm for a larger number of subjects is ProMove + improve.

TFG: Design and implementation of modules for a low cost radar system.


In the last years many low-cost radar modules have appeared on the market, allowing the implementation of this technology in a large number of applications, such as medical applications or people detection.

The B105 Electronic Systems Lab developed a prototype for the control, management and processing of the signals generated by these transceiver radars. The aim of the project is increasing the system versatility while correcting the problems it presented. So, the first step consisted on analysing the existing system and evaluating the aspects in which it could be improved.

Then, the focus shifted to the design of several circuits that allowed to digitally change the amplification and filtering of the analog signals of the radar module. The circuit that modulates the radar transceiver was also modified to make it configurable. Once the designs were made a printed circuit board (PCB) was developed and manufactured.

An update of the existing software was needed since the hardware modules have been modified. Functions that handle the different amplification and filtering configurations of the system were developed. Also, a communication that would allow sending orders from a computer to the module was added. This communication allows the modification of the parameters during the operation of the system. The parameters include the amplification, the filtering characteristics, as well as the modulation parameters of the radar transceiver.



Currently there are various systems to measure deformations such as optical systems of video or laser as well as direct contact systems,  which can be classified in mechanical and electrical systems. The strain gauges belong to this last group. These gauges are devices that resemble a rectangular sheet whose dimensions typically span just a few centimeters length. In its interior there is a conductive or semiconducting wire with the form of a grid which has the ability to vary its electrical resistance when it is deformed. Compared to other technologies, strain gauges offer a much more affordable price and its use is very simple. Given their increasing perfection, they can offer benefits similar to other technologies and that is why the interest they receive has been increasing considerably, giving rise to a wide gauge market with a great variety of features and prices.

This work was born with the goal of developing a system that measures deformations based on its use for different materials with certain levels of precision, accuracy and reliability, as well as designing it as generic as possible to allow the use of any gauge that is offered in the market.

The design of the system consists of a Discovery board that tries to sample the signal coming from the gauges for its later transformation and processing. The data are sended and displayed on the computer screen through a program that reads the USB port.

The study covers different measurement techniques based on the use of different configurations that connect the gauges to the Discovery board for a comparison of results and effectiveness with each method. It also seeks to analyze the performance of different types of strain gauges with different characteristics.


Captura de pantalla 2018-01-23 a las 17.11.36


A wireless sensor network (WSN) is a kind of network that contains nodes communicating wireless. It has sensors that allow to obtain information directly from the environment in order to learn or act on it.

Since the use of this wireless networks is growing, it appears the need of creating cognitive networks which are able to learn from the environment and adapt themselves efficiently.

The B105 Electronic Systems Lab research group developed a test-bench containing some nodes called ‘cognitive New Generation Device (cNGD)’. Currently, each of them is programmed by connecting it physically to a computer. However, this situation produces a lot of problems, like the required time to perform the node programming or the necessity of reprogramming a node that is out of reach. This is the main reason why a wireless programming method becomes very handy.

The aim of this project is to improve the already available Bootloader getting a better reception and to manage the available random access memory. For this purpose, a Wake On Radio (WOR) board was used to wake up a specific cNGD node and then work on this node independently. However, some modifications were required due to hardware and software limitations. Even though the node has three transceivers on ISM (Industrial, scientist and medical) free bands, it was used the 434 MHz band for the WOR and the 2.45GHz band for the Bootloader due to its speed.

Captura de pantalla 2018-01-23 a las 17.13.26

In addition, an graphical interface was implemented for the test-bench in order to see the status of the cNGD nodes, the code transmission and the connection processes. It also has another tab for the choice of the cNGD nodes to wake up and reprogram. This interface is a web application with the server side implemented with the Python programming language, so we can reach it only with an internet connection.

Captura de pantalla 2018-01-23 a las 17.15.06

Finally, some tests were run to verify the expected behavior of the test-bench. These test are documented at the end of the memoir.

Obtención de indicadores de fatiga mediante el electroencefalograma.


Desde el proyecto Simbiosys, buscamos nuevas formas de detección de fatiga. Puesto que el sistema está destinado a ser usado en un simulador para conductores de vehículos, se busca que sea lo menos intrusivo posible, para facilitar el movimiento y comodidad del conductor.

Con este fin se está desarrollando un sistema multisensor con una parte importante de investigación como es la detección de distintos estados de fatiga mediante la actividad cerebral del conductor.

Para la obtención del electroencefalograma (EEG) se eligió un casco con un único electrodo, ya que los EEG convencionales presentan más de veinte electrodos, lo cual sería muy intrusivo para el conductor.


Tras la obtención de la señal en bruto del cerebro, el sistema se basa en la detección de la cantidad de energía que existe en las diferentes bandas del cerebro. En este caso las bandas de interés serán la banda alpha, betha y tetha, todas ellas relacionadas con estados de cansancio, fatiga o sueño.


El sistema consta de dos partes diferenciadas, basadas en machine learning. En la primera parte se obtiene las características – la energía de cada banda- del sujeto en estado de consciencia (no fatigado) para formar dos clústeres.

El objetivo es generar dos esferas que engloben todas las características en este estado, de tal forma que, si en la segunda parte del algoritmo se obtiene alguna característica que no pertenece a los clústeres, se considera una anomalía. Será la acumulación de anomalías durante un periodo de tiempo la que nos indique la presencia de fatiga en el sujeto.


Development of a network of devices connected through the LIN (Local Interconnect network) bus.


The communication among a high number of electronic devices creates several troubles. The most common being: latency, data errors and high development cost. This lead to the creation of device networks, which objective is to link many devices using as few conductors as possible. This new network should fulfill some requirements such as; efficiency, low cost, and robustness. The need of satisfying such requirements gave place to the construction of the bus of communication. Generally, the automotive industry uses CAN (Controller Area Network), LIN (Local Interconnected network) and FlexRay buses to connect their devices. Each of them are used for a specific application inside of the automobile. The efficient performance of this buses has allowed different industries to incorporate them to their systems. Nowadays CAN and LIN are used in domotic systems, medical equipment, automatization factories, navy electronic, industrial machines control, among others. Moreover, many projects are development in the B105 Electronic Systems Lab where it is necessary to link different actuators and sensors because of this, it has been decided to implement a LIN network.

The Project was composed of a master node and two slaves nodes that interact with each other. The discovery kit STM32F411E DISCO was used to implement the master and the slave node. Finally, the other devices the discovery kit STM32F411E DISCO possess like the diodes led (actuators) and the accelerometers (sensors) were used for the working demonstration.